Type Members

1.  case class ADD (a: RegNo, b: RegNo, c: RegNo) extends Instr with Product with Serializable

   Add the values in registers b and c, store the result in register a.

2.  case class ADDI (a: RegNo, b: RegNo, im: Imm) extends Instr with Product with Serializable

   Add the value in register b and the value im, store the result in register a.

3.  case class AND (a: RegNo, b: RegNo, c: RegNo) extends Instr with Product with Serializable

   Bitwise AND the values in registers b and c, store the (integer) remainder in register a.

4.  case class ANDI (a: RegNo, b: RegNo, im: Imm) extends Instr with Product with Serializable

   Bitwise AND the value in registers b and the value im, store the (integer) remainder in register a.

5.  type AssemCode = Seq[Assembler]

   An assembler code sequence.

   An assembler code sequence. Includes comments and labels.

6.  sealed abstract class Assembler extends AnyRef

   Machine instructions.

7.  case class BEQ (label: Label) extends Branch with Product with Serializable

   If the Z condition code is set, set the program counter to its value plus four times disp.

8.  case class BGE (label: Label) extends Branch with Product with Serializable

   If the N condition code is clear, set the program counter to its value plus four times disp.

9.  case class BGT (label: Label) extends Branch with Product with Serializable

   If both of the Z and N condition codes are clear, set the program counter to its value plus four times disp.

10.  case class BLE (label: Label) extends Branch with Product with Serializable

    If either of the Z or N condition codes is set, set the program counter to its value plus four times disp.

11.  case class BLT (label: Label) extends Branch with Product with Serializable

    If the N condition code is set, set the program counter to its value plus four times disp.

12.  case class BNE (label: Label) extends Branch with Product with Serializable

    If the Z condition code is clear, set the program counter to its value plus four times disp.

13.  case class BR (label: Label) extends Branch with Product with Serializable

    Set the program counter to its value plus disp.

14.  case class BSR (label: Label) extends Branch with Product with Serializable

    Set R31 to the value of the program counter plus one.

    Set R31 to the value of the program counter plus one. Set the program counter to its value plus disp.

15.  sealed abstract class Branch extends Instr

    Common type for all branch instructions.

16.  case class CHKI (b: RegNo, im: Imm) extends Instr with Product with Serializable

    If register a contains a value that is negative or greater than or equal to the value im, set register a to zero.

17.  case class CMP (b: RegNo, c: RegNo) extends Instr with Product with Serializable

    Set the Z condition code if the contents of registers b and c are equal.

    Set the Z condition code if the contents of registers b and c are equal. Set the N condition code if the content of register b is less than the content of register c.

18.  case class CMPI (b: RegNo, im: Imm) extends Instr with Product with Serializable

    Set the Z condition code if the content of register b and the value im are equal, otherwise clear Z.

    Set the Z condition code if the content of register b and the value im are equal, otherwise clear Z. Set the N condition code if the content of register b is less than the value im, otherwise clear N.

19.  type Code = Seq[Instr]

    A machine code sequence.

20.  case class Comment (text: String) extends Pseudo with Product with Serializable

    Comment.

21.  case class DIV (a: RegNo, b: RegNo, c: RegNo) extends Instr with Product with Serializable

    Divide the values in registers b and c, store the (integer) result in register a.

22.  case class DIVI (a: RegNo, b: RegNo, im: Imm) extends Instr with Product with Serializable

    Divide the value in register b and the value im, store the (integer) result in register a.

23.  type Disp = Int
24.  type Imm = Short

    Operand types

25.  sealed abstract class Instr extends Assembler
26.  case class LDB (a: RegNo, b: RegNo, im: Imm) extends Instr with Product with Serializable

    Load register a with the byte value stored in memory at the address given by the contents of register b plus the value im.

27.  case class LDW (a: RegNo, b: RegNo, im: Imm) extends Instr with Product with Serializable

    Load register a with the word value stored in memory at the address given by the contents of register b plus the value im.

    Load register a with the word value stored in memory at the address given by the contents of register b plus the value im. The lowest two bits of the address are ignored.

28.  case class Label (num: Int, disp: Int = 1) extends Instr with Product with Serializable

    Branch target labels.

    Branch target labels. If the disp field is -1 then this label has not been resolved. Otherwise, disp gives the offset from the start of the code block.

29.  case class MOD (a: RegNo, b: RegNo, c: RegNo) extends Instr with Product with Serializable

    Divide the values in registers b and c, store the (integer) remainder in register a.

30.  case class MODI (a: RegNo, b: RegNo, im: Imm) extends Instr with Product with Serializable

    Divide the value in registers b and the value im, store the (integer) remainder in register a.

31.  case class MOV (a: RegNo, b: RegNo, c: RegNo) extends Instr with Product with Serializable

    Shift the value in register c by b and store the result in register a.

32.  case class MOVI (a: RegNo, b: RegNo, im: Imm) extends Instr with Product with Serializable

    Shift the value im by b and store the result in register a.

33.  case class MUL (a: RegNo, b: RegNo, c: RegNo) extends Instr with Product with Serializable

    Muliply the values in registers b and c, store the result in register a.

34.  case class MULI (a: RegNo, b: RegNo, im: Imm) extends Instr with Product with Serializable

    Multiply the value in register b and the value im, store the result in register a.

35.  case class MVN (a: RegNo, b: RegNo, c: RegNo) extends Instr with Product with Serializable

    Shift the value in register c by b and store the negation of the result in register a.

36.  case class MVNI (a: RegNo, b: RegNo, im: Imm) extends Instr with Product with Serializable

    Shift the value im by b and store the negation of the result in register a.

37.  case class OR (a: RegNo, b: RegNo, c: RegNo) extends Instr with Product with Serializable

    Bitwise OR the values in registers b and c, store the (integer) remainder in register a.

38.  case class ORI (a: RegNo, b: RegNo, im: Imm) extends Instr with Product with Serializable

    Bitwise OR the value in registers b and the value im, store the (integer) remainder in register a.

39.  case class POP (a: RegNo, b: RegNo, im: Imm) extends Instr with Product with Serializable

    Load register a with the word value stored in register b.

    Load register a with the word value stored in register b. The lowest two bits of the address are ignored. Subtract (???) im from the contents of register b and store the result in register b.

40.  case class PSH (a: RegNo, b: RegNo, im: Imm) extends Instr with Product with Serializable

    Add im to the contents of register b and store the result in register b.

    Add im to the contents of register b and store the result in register b. Store the value in register a into memory at the address given by the contents of register b. The lowest two bits of the address are ignored.

41.  sealed abstract class Pseudo extends Assembler

    Pseudo instructions.

    Pseudo instructions. These aren't really RISC machine instructions but are used to insert comments and labels into a RISC assembly code program

42.  case class RD (a: RegNo) extends Instr with Product with Serializable

    Read an integer variable from standard input and store the value in register a.

43.  case class RET (c: RegNo) extends Instr with Product with Serializable

    Set the program counter to the value in register c.

    Set the program counter to the value in register c. If that value is zero, halt the machine.

44.  type RegNo = Int

    Register numbers (0-31).

    Register numbers (0-31). Program counter is R28.

45.  case class STB (a: RegNo, b: RegNo, im: Imm) extends Instr with Product with Serializable

    Store the least-significant byte of the contents of register a to memory at the address given by the contents of register b plus the value im.

46.  case class STW (a: RegNo, b: RegNo, im: Imm) extends Instr with Product with Serializable

    Store the contents of register a to memory at the address given by the contents of register b plus the value im.

    Store the contents of register a to memory at the address given by the contents of register b plus the value im. The lowest two bits of the address are ignored.

47.  case class SUB (a: RegNo, b: RegNo, c: RegNo) extends Instr with Product with Serializable

    Subtract the values in registers b and c, store the result in register a.

48.  case class SUBI (a: RegNo, b: RegNo, im: Imm) extends Instr with Product with Serializable

    Subtract the value in register b and the value im, store the result in register a.

49.  case class Target (label: Label) extends Pseudo with Product with Serializable

    Branch target label.

50.  case class WRD (c: RegNo) extends Instr with Product with Serializable

    Write a decimal representation of the value in register c to standard output.

51.  case class WRH (c: RegNo) extends Instr with Product with Serializable

    Write a hexadecimal representation of the value in register c to standard output.

52.  case class WRL () extends Instr with Product with Serializable

    Write a newline to standard output.

53.  case class XOR (a: RegNo, b: RegNo, c: RegNo) extends Instr with Product with Serializable

    Bitwise XOR the values in registers b and c, store the (integer) remainder in register a.

54.  case class XORI (a: RegNo, b: RegNo, im: Imm) extends Instr with Product with Serializable

    Bitwise XOR the value in registers b and the value im, store the (integer) remainder in register a.